Embodiments in accordance with the invention relate to a capacity measuring circuit. Further embodiments in accordance with the invention relate to a sensor system. Further embodiments in accordance with the invention relate to a method for measuring a capacity.
Embodiments in accordance with the invention relate to measuring capacities using delta-sigma modulators of narrow-band spurious emission.
Embodiments in accordance with the invention relate to a capacity-to-digital converter (CDC) (also referred to as “capacitive-to-digital converter”) including sine excitation.
It is desirable in many technical fields to determine the quantity of a capacity. There are, for example, a plurality of different sensors in which a technical or physical measuring quantity to be detected has influence on the value of a sensor capacity. Thus, the value of the sensor capacity changes depending on the technical or physical quantity to be detected. It is desirable in many cases to provide a piece of digital information describing the value of the sensor capacity, which thus allows drawing conclusions as to the technical or physical quantity to be measured.
Irrespective of sensor technology, it is desirable in many cases to determine the value of a capacity at high precision. This exemplarily applies to the laboratory field where measuring a capacity is often necessitated for matching modules. Additionally, it may exemplarily be of importance to establish the value of a tuning capacity or matching capacity connected to an antenna structure.
In summary, one can see that capacitive sensors are widely used in measuring and sensor technology and that measuring a capacity is also frequently necessitated in other fields.
Furthermore, it is to be stated that there are different measuring methods for determining capacity values. Examples of known measuring methods are:                Detunable oscillators in which the frequency of the oscillation is influenced by the capacitive value.        Charge transfer methods in which a first capacity is charged in a first time phase and the charge is transferred to a second capacity in a second phase. Here, both the first capacity and the second capacity may be used as measuring capacity.        Synchronous demodulator method: the amplitude of a sine or square-wave oscillation is modulated by the change in capacity and transformed to a measuring signal using low-pass filtering.        Using standard sigma-delta modulators including pulsed charge transfer on sensor electronics: operating a delta-sigma modulator with a reference voltage at the input and evaluating changes in the capacity in the input branch.        
Sigma-delta modulators are frequently used for measuring capacities. The structure and mode of functioning of conventional delta-sigma modulators will be discussed below briefly.
In this regard, reference is at first to be made to DE 10 2005 038 875 A1 which describes a capacity measuring circuit. The capacity measuring circuit includes a delta-sigma modulator comprising an operational amplifier, a first capacitor connectable to an input of the operational amplifier and a second capacitor in a feedback branch of the operational amplifier. The capacity measuring circuit additionally includes a reference signal source which is connectable to the first capacitor. The first or second capacitor here represents a capacity to be measured. In the capacity measuring circuit, it is not an input quantity at the input of the delta-sigma modulator that is measured and digitalized, but instead a defined reference signal source is connected at the input, and a component of the delta-sigma modulator itself represents the measuring quantity. The measuring result here is made available in a digital form.
WO 2006/098976 A2 describes an interface circuit for a capacitor including a terminal. The interface circuit for detecting the capacity of the capacitor includes a differential integrating amplifier including an input common mode voltage and two summarizing nodes, the voltage of which basically corresponds to the input common mode voltage. Additionally, the interface includes a switch circuit for charging the capacitor to a first voltage level in a first phase and for connecting the capacitor to one of the summarizing nodes of the differential amplifier in a second phase. This causes a first output change which is basically representative of the difference between the first voltage level and the input common mode voltage and which is also representative of the capacitor itself. In addition, the switch circuit is configured to charge the capacitor to a second voltage level in a third phase and to connect the capacitor to the other summarizing node of the differential amplifier in a fourth phase to thus provide a second output change which is basically representative of the difference between the second voltage level and the input common mode voltage and is also representative of the capacitor itself. The combined first and second output changes represent the capacity of the capacitor, basically irrespective of the input common mode voltage.
The principle of a delta-sigma modulator will be described below briefly referring to FIG. 8. FIG. 8 shows a block circuit diagram of a delta-sigma modulator. The delta-sigma modulator 800 in accordance with FIG. 8 includes an input-side summer 810 configured to receive a measuring quantity Umes, a switchable reference quantity UREFP or UREFN and, optionally, an offset quantity Uoff and to sum the quantities received with corresponding signs. The offset quantity Uoff may exemplarily be of a negative sign and exemplarily compensate the measuring quantity Umes at least partly. This means that, at an output of the summer 810, there is a quantity 812 which corresponds to a result of a summation (if needed, taking into account the signs) of the measuring quantity Umes, the offset quantity Uoff and the respective reference quantity UREFP or UREFN.
In addition, the delta-sigma modulator 800 includes an integrator 820 configured to receive and integrate the sum quantity 812, thus to obtain an integrator output signal 822.
Additionally, the delta-sigma modulator 800 includes a threshold value decider 830 configured to receive the integrator output signal or integrator result signal 822 and compare same to a threshold value so as to obtain a discrete-value (such as, for example, binary) output signal 832 representing a result of the comparison. Advantageously, the output signal 832 is of a discrete-time manner and thus represents a digital bit stream. The output signal 832 or the corresponding digital bit stream is also used to decide whether the summer 810 is fed a first reference quantity UREFP or a second reference quantity UREFN. Thus, the output signal 832 of the threshold value decider typically decides whether the output signal 812 of the summer 810 effects an upward integration or downward integration of the integrator 820.
Referring to FIG. 9, a conventional delta-sigma modulator for measuring a voltage signal will be described below in more detail. A somewhat simplified circuit diagram of such a sigma-delta modulator 900 is shown in FIG. 9.
The sigma-delta modulator 900 receives an input voltage vin and, based thereon, provides a digital bit stream 920 which describes the input voltage vin (exemplarily referenced to a reference potential GND). The sigma-delta modulator 900 includes, as a central element, an integrator 930 configured to integrate an electrical charge. For this purpose, the integrator 930 includes an operational amplifier 934 and an integration capacity Cint. A non-inverting input (+), for example, is coupled to the reference potential GND. The integration capacity Cint, for example, is connected between the inverting input (−) and the output of the operational amplifier 932. A node at the inverting input (−) of the operational amplifier 932 serves as a charge summation node since a charge flowing into this charge summation node 932 is integrated onto the integration capacity Cint. In this regard, it is also to be stated that the charge summation node 932 represents a virtual mass node since the operational amplifier 932—except for parasitic offset voltages—at least approximately causes the charge summation node 932 to be at the same potential as the non-inverting input (+), that is exemplarily at the reference potential. Additionally, normally it can be assumed that a charge flowing into the inverting operational amplifier input is negligibly small since the inputs of the operational amplifier 932 are typically of very high resistance.
The sigma-delta modulator 900 additionally comprises an input capacity Cin, the first terminal of which is connectable to the input voltage vin via a switch 940 in a first phase and to the reference potential GND in a second phase. A second terminal of the input capacity Cin is connectable to the reference potential GND via a switch 942 in a first phase and to the charge summation node 932 in a second phase. Thus, the input capacity Cin is charged in the first phase (switch position of the switches 940, 942 as shown in FIG. 9), wherein a charge deposited on the input capacity Cin depends on the quantity of the input voltage vin (referenced to the reference potential) and the quantity of the capacity Cin, wherein Qin=Cin*vin. In the second phase where the switch positions of the switches 940, 942 are opposite to the switch positions shown in FIG. 9, the input capacity Cin is discharged, wherein the charge deposited on the capacity Cin in the first phase is fed to the integration capacity Cint, if and insofar as same is not compensated by the charge from the feedback capacity Cfb and/or the offset capacity Coffset.
The sigma-delta modulator additionally includes a feedback branch. The feedback branch basically includes a threshold value comparer 950. The threshold value comparer 950 is, for example, configured to compare the voltage at the output of the operational amplifier 934 to the reference potential and to provide, depending on a result of the comparison, a first digital value or a second digital value at its output. The first digital value (such as, for example, logic “0”) or second digital value (such as, for example, logic “1”) here forms a bit of the digital bit stream 920. Additionally, the sigma-delta modulator includes a feedback charge provider 960 configured to feed, depending on the digital value at the output of the threshold value comparer 950, in a cycle of the sigma-delta modulator, a positive charge of a predetermined amount of charge or a negative charge of a predetermined amount of charge to the charge summation node 932. For this purpose, the feedback capacity Cfb is exemplarily discharged in a first phase via a first switch 962 and a second switch 964. In a second phase, a first terminal of the feedback capacity Cfb is optionally, depending on whether the output of the threshold value comparer 950 takes a first logic level or a second logic level, connected to a positive reference voltage vrefp or a negative reference voltage vrefn. At the same time, a second terminal of the feedback capacity Cfb is coupled to the charge summation node 932 in the second phase. Correspondingly, a feedback charge Qfb=Cfb*vrefp or a charge Qfb=Cfb*vrefn is provided to the summation node 932 using the feedback capacity Cfb, depending on whether the output of the threshold value comparer 950 in the respective cycle of the delta-sigma modulator takes a first logic value or a second logic value.
Optionally, during a cycle of the sigma-delta modulator, an offset charge may additionally be fed to the charge summation node 932 using an offset charge providing circuit 970 to exemplarily set an offset value of the sigma-delta modulator.
All in all, a digital bit stream 920 is generated, which (by driving the offset charge providing circuit 960) causes the charge fed to the charge summation node 932 via the input capacity Cin to be basically compensated by the sum of the charge fed to the charge summation node 932 by the feedback charge providing circuit 960 and (optionally) by the offset charge providing circuit 970. The digital bit stream thus indicates for a sequence of cycles of the sigma-delta modulator whether a positive feedback charge or a negative feedback charge is to be fed to the charge summation node 932 in order to reduce the level at the output of the operational amplifier 932 to the threshold value of the threshold value comparer 950. Thus, the digital bit stream 920 is a measure of a charge Qin fed to the charge summation node 932 in a cycle of the sigma-delta modulator, which in turn is a product of the input voltage vin and the input capacity Cin.
A capacity measuring circuit (also referred to as “capacitive measuring circuit”) 1000 using a “standard” sigma-delta modulator will be described below referring to FIG. 10. This circuit differs only slightly from the sigma-delta modulator 900 in accordance with FIG. 9 which serves for measuring a voltage signal so that only the differences will be explained. Furthermore, same means or means of the same effect are provided with the same reference numerals and will not be discussed again.
The measuring circuit 1000 differs from the measuring circuit 900 in accordance with FIG. 9 as to how the input charge is fed to the charge summation node 932. The capacity measuring circuit 1000 here includes a capacity or sensor capacity Csensor to be measured which is discharged in a first phase using switches 1040, 1042. The capacity or sensor capacity Csensor to be measured is additionally connected between a predetermined, typically constant-time reference potential vrefn or reference potential vrefp and the charge summation node 932 in a second phase via the switches 1040, 1042 such that the charge summation node here is fed a charge Qsensor=vrefn*Csensor and Qsensor=vrefp*Csensor, respectively, in a cycle of the capacity measuring circuit. The charge fed to the charge summation node 932 due to the capacity or sensor capacity Csensor to be measured is, due to the fact that the voltage vrefn or vrefp is predetermined and known, a measure of the unknown capacity or capacity to be measured Csensor. This charge Qsensor deposited due to the capacity to the measured or sensor capacity Csensor is determined by the sigma-delta converter such that the digital bit stream 920 describes the charge Qsensor and, thus, also describes the capacity Csensor.
Although sigma-delta modulators are frequently used for measuring capacities, as is exemplarily described referring to FIG. 10, it has been found out that there are problems with broad-band spurious emission in some applications due to the pulsed recharge of the sensor capacity (such as, for example, the capacity Csensor in accordance with FIG. 10).
It has been found out that this exemplarily is the case when this method (such as, for example, the method described referring to FIG. 10) is used for monitoring electrically driven windows and doors in the closing process so as to avoid unintentional trapping of persons and objects.
It has been found out that the antenna-like structure of the sensor capacity causes broad-band emission of electromagnetic waves by the pulsed recharge currents, caused by the nearly square wave-pulsed driving of the sensor capacity.
It has additionally been found out that this results in threshold values with regard to electromagnetic compatibility to be exceeded in different applications. When being used in the automobile industry, this may result in an audible disturbance in radio receiving which can hardly be avoided since the spectral band emitted can be identified up into the gigahertz range.
Narrow-band measuring methods are conventionally used in order to reduce or avoid the problems mentioned with regard to electromagnetic compatibility. Such narrow-band measuring methods frequently use synchronous demodulators or lock-in amplifiers. This limits spurious emission to a small band. However, these methods are of considerable disadvantage as far as offset compensation, amplification setting and measuring frequency switching are concerned.